LTC2937 Programmable Six Channel Sequencer and Voltage Supervisor with EEPROM

Register Map Tables

Resigter Map Formats:
Register Map
Condensed Table
Expanded Table

Address(es)	0x36	0x37	0x38	0x39	0x3A	0x3B	0x3C	0x3D	0x3E	0x3F	0x40	0x41	0x42	0x43	0x44	0x45	0x46	0x47	0x48	0x49	0x4A	0x4B	0x4C	0x4D	0x4E	0x4F	0x50	0x51

Register Map

SUB ADDR	Name	Bit[15]	Bit[14]	Bit[13]	Bit[12]	Bit[11]	Bit[10]	Bit[9]	Bit[8]	Bit[7]	Bit[6]	Bit[5]	Bit[4]	Bit[3]	Bit[2]	Bit[1]	Bit[0]
0x00	WRITE_PROTECTION_CMD (R/W)	device_key														hw_lock_bit	sw_lock_bit
0x01	SPECIAL_LOT_CMD (R/W)	SPECIAL_LOT
0x02	ON_OFF_CONTROL_CMD (R/W)									on_state	i2c_margin	discharge_start	i2c_on_off	i2c_on_off_mask	on_input_mask	on_polarity	seq_down_qual
0x03	V_RANGE_CMD (R/W)					v6_range		v5_range		v4_range		v3_range		v2_range		v1_range
0x04	V_THRESHOLD_1_CMD (R/W)	ov_threshold_1								uv_threshold_1
0x05	V_THRESHOLD_2_CMD (R/W)	ov_threshold_2								uv_threshold_2
0x06	V_THRESHOLD_3_CMD (R/W)	ov_threshold_3								uv_threshold_3
0x07	V_THRESHOLD_4_CMD (R/W)	ov_threshold_4								uv_threshold_4
0x08	V_THRESHOLD_5_CMD (R/W)	ov_threshold_5								uv_threshold_5
0x09	V_THRESHOLD_6_CMD (R/W)	ov_threshold_6								uv_threshold_6
0x0A	TON_TIMERS_1_CMD (R/W)	ton_max_1			ton_delay_1
0x0B	TON_TIMERS_2_CMD (R/W)	ton_max_2			ton_delay_2
0x0C	TON_TIMERS_3_CMD (R/W)	ton_max_3			ton_delay_3
0x0D	TON_TIMERS_4_CMD (R/W)	ton_max_4			ton_delay_4
0x0E	TON_TIMERS_5_CMD (R/W)	ton_max_5			ton_delay_5
0x0F	TON_TIMERS_6_CMD (R/W)	ton_max_6			ton_delay_6
0x10	TOFF_TIMERS_1_CMD (R/W)	toff_max_1			toff_delay_1
0x11	TOFF_TIMERS_2_CMD (R/W)	toff_max_2			toff_delay_2
0x12	TOFF_TIMERS_3_CMD (R/W)	toff_max_3			toff_delay_3
0x13	TOFF_TIMERS_4_CMD (R/W)	toff_max_4			toff_delay_4
0x14	TOFF_TIMERS_5_CMD (R/W)	toff_max_5			toff_delay_5
0x15	TOFF_TIMERS_6_CMD (R/W)	toff_max_6			toff_delay_6
0x16	SEQ_UP_POSITION_1_CMD (R/W)						async_on_off_1	seq_up_position_1
0x17	SEQ_UP_POSITION_2_CMD (R/W)						async_on_off_2	seq_up_position_2
0x18	SEQ_UP_POSITION_3_CMD (R/W)						async_on_off_3	seq_up_position_3
0x19	SEQ_UP_POSITION_4_CMD (R/W)						async_on_off_4	seq_up_position_4
0x1A	SEQ_UP_POSITION_5_CMD (R/W)						async_on_off_5	seq_up_position_5
0x1B	SEQ_UP_POSITION_6_CMD (R/W)						async_on_off_6	seq_up_position_6
0x1C	SEQ_DOWN_POSITION_1_CMD (R/W)						active_pull_down_1	seq_down_position_1
0x1D	SEQ_DOWN_POSITION_2_CMD (R/W)						active_pull_down_2	seq_down_position_2
0x1E	SEQ_DOWN_POSITION_3_CMD (R/W)						active_pull_down_3	seq_down_position_3
0x1F	SEQ_DOWN_POSITION_4_CMD (R/W)						active_pull_down_4	seq_down_position_4
0x20	SEQ_DOWN_POSITION_5_CMD (R/W)						active_pull_down_5	seq_down_position_5
0x21	SEQ_DOWN_POSITION_6_CMD (R/W)						active_pull_down_6	seq_down_position_6
0x22	RSTB_CONFIG_CMD (R/W)	rstb_delay			sv_fault_enable	v6_ov_enable	v5_ov_enable	v4_ov_enable	v3_ov_enable	v2_ov_enable	v1_ov_enable	v6_uv_enable	v5_uv_enable	v4_uv_enable	v3_uv_enable	v2_uv_enable	v1_uv_enable
0x23	FAULT_RESPONSE_CMD (R/W)			retry_count			faultb_state	faultb_mask	freeze	retry_delay			fault_response_action		retry_number
0x26	MONITOR_STATUS_HISTORY_CMD (R)	sf_chan_hist			sv_fault_status	v6_ov_sv_fault	v6_uv_sv_fault	v5_ov_sv_fault	v5_uv_sv_fault	v4_ov_sv_fault	v4_uv_sv_fault	v3_ov_sv_fault	v3_uv_sv_fault	v2_ov_sv_fault	v2_uv_sv_fault	v1_ov_sv_fault	v1_uv_sv_fault
0x28	CLEAR_ALERTB_CMD (R)	CLEAR_ALERTB
0x29	STATUS_INFORMATION_CMD (R)	sf_channel			mb_state	local_seq_status		group_seq_status		seq_up_fault	seq_down_fault	ov_fault	uv_fault	sv_fault	discharge	seq_control_fault	other_fault
0x2A	BREAK_POINT_CMD (R/W)						bp_enable	bp_value
0x2B	SEQ_POSITION_COUNT_CMD (R)						sp_bp_test	sp_count
0x2F	MONITOR_BACKUP_CMD (R)	bu_sf_chan			bu_svf_state	bu_v6_ov_sv_fault	bu_v6_uv_sv_fault	bu_v5_ov_sv_fault	bu_v5_uv_sv_fault	bu_v4_ov_sv_fault	bu_v4_uv_sv_fault	bu_v3_ov_sv_fault	bu_v3_uv_sv_fault	bu_v2_ov_sv_fault	bu_v2_uv_sv_fault	bu_v1_ov_sv_fault	bu_v1_uv_sv_fault
0x30	MONITOR_STATUS_CMD (R)			margin_status	rstb_status	v6_ov_status	v6_uv_status	v5_ov_status	v5_uv_status	v4_ov_status	v4_uv_status	v3_ov_status	v3_uv_status	v2_ov_status	v2_uv_status	v1_ov_status	v1_uv_status
0x31	DEVICE_ID_CMD (R)	DEVICE_ID

Condensed Table

SYMBOL	SUB ADDR	R/W	BITS	DEFAULT	DESCRIPTION
WRITE_PROTECTION_CMD	0x00	R/W	15:0	N/A	Contains lock key code and lock bit to prevent accidental changes.
device_key			15:2	3754	Must match against programmed word to change lock bit.
hw_lock_bit			1	N/A	State of external WP Input. No register writes are possible when locked.
sw_lock_bit			0	1	Write lock bit. No register writes are possible when locked.
SPECIAL_LOT	0x01	R/W	15:0	0	Returns two bytes indicating a factory special lot number. Users may over write the register with their own information.
ON_OFF_CONTROL_CMD	0x02	R/W	7:0	N/A	Configures the combination of ON input and/or I2C inputs needed to control sequencing. Also, activates margin mode of operation.
on_state			7	N/A	Internal ON status
i2c_margin			6	0	RSTB disable
discharge_start			5	0	Require or Not Require that all sequenced Voltage Monitor Channels are discharged below their thresholds before sequencing up.
i2c_on_off			4	0	Software/I2C controlled Sequencing.
i2c_on_off_mask			3	0	serial bus on_off control mask
on_input_mask			2	0	Determines how part responds to the ON input.
on_polarity			1	0	Determines polarity of the ON Input. ACTIVEHIGH = Pull ON high to sequence up. ACTIVELOW = Pull ON low to sequence up.
seq_down_qual			0	0	Selects Time or Event based Sequence Down.
V_RANGE_CMD	0x03	R/W	11:0	85
v6_range			11:10	0	Monitor range setting for Voltage Monitor 6.
v5_range			9:8	0	Monitor range setting for Voltage Monitor 5.
v4_range			7:6	1	Monitor range setting for Voltage Monitor 4.
v3_range			5:4	1	Monitor range setting for Voltage Monitor 3.
v2_range			3:2	1	Monitor range setting for Voltage Monitor 2.
v1_range			1:0	1	Monitor range setting for Voltage Monitor 1.
V_THRESHOLD_1_CMD	0x04	R/W	15:0	22335
ov_threshold_1			15:8	87	Specify V1 OV Threshold.
uv_threshold_1			7:0	63	Specify V1 UV Threshold.
V_THRESHOLD_2_CMD	0x05	R/W	15:0	30810
ov_threshold_2			15:8	120	Specify V2 OV Threshold.
uv_threshold_2			7:0	90	Specify V2 UV Threshold.
V_THRESHOLD_3_CMD	0x06	R/W	15:0	39285
ov_threshold_3			15:8	153	Specify V3 OV Threshold.
uv_threshold_3			7:0	117	Specify V3 UV Threshold.
V_THRESHOLD_4_CMD	0x07	R/W	15:0	59060
ov_threshold_4			15:8	230	Specify V4 OV Threshold.
uv_threshold_4			7:0	180	Specify V4 UV Threshold.
V_THRESHOLD_5_CMD	0x08	R/W	15:0	35176
ov_threshold_5			15:8	137	Specify V5 OV Threshold..
uv_threshold_5			7:0	104	Specify V5 UV Threshold.
V_THRESHOLD_6_CMD	0x09	R/W	15:0	59060
ov_threshold_6			15:8	230	Specify V6 OV Threshold.
uv_threshold_6			7:0	180	Specify V6 UV Threshold.
TON_TIMERS_1_CMD	0x0A	R/W	15:0	0
ton_max_1			15:13	0	Sets the maximum voltage monitor rise time for Channel 1.
ton_delay_1			12:0	0	Sets time delay between the start of V1's selected sequence position and the release of EN1.
TON_TIMERS_2_CMD	0x0B	R/W	15:0	0
ton_max_2			15:13	0	Sets the maximum voltage monitor rise time for Channel 2.
ton_delay_2			12:0	0	Sets time delay between the start of V2's selected sequence position and the release of EN2.
TON_TIMERS_3_CMD	0x0C	R/W	15:0	0
ton_max_3			15:13	0	Sets the maximum voltage monitor rise time for Channel 3.
ton_delay_3			12:0	0	Sets time delay between the start of V3's selected sequence position and the release of EN3.
TON_TIMERS_4_CMD	0x0D	R/W	15:0	0
ton_max_4			15:13	0	Sets the maximum voltage monitor rise time for Channel 4.
ton_delay_4			12:0	0	Sets time delay between the start of V4's selected sequence position and the release of EN4.
TON_TIMERS_5_CMD	0x0E	R/W	15:0	0
ton_max_5			15:13	0	Sets the maximum voltage monitor rise time for Channel 5.
ton_delay_5			12:0	0	Sets time delay between the start of V5's selected sequence position and the release of EN5.
TON_TIMERS_6_CMD	0x0F	R/W	15:0	0
ton_max_6			15:13	0	Sets the maximum voltage monitor rise time for Channel 6.
ton_delay_6			12:0	0	Sets time delay between the start of V6's selected sequence position and the release of EN6.
TOFF_TIMERS_1_CMD	0x10	R/W	15:0	0
toff_max_1			15:13	0	Sets the maximum voltage monitor fall time for Channel 1.
toff_delay_1			12:0	0	Sets time delay between the start of V1's selected sequence position and pulling EN1 low.
TOFF_TIMERS_2_CMD	0x11	R/W	15:0	0
toff_max_2			15:13	0	Sets the maximum voltage monitor fall time for Channel 2.
toff_delay_2			12:0	0	Sets time delay between the start of V2's selected sequence position and pulling EN2 low.
TOFF_TIMERS_3_CMD	0x12	R/W	15:0	0
toff_max_3			15:13	0	Sets the maximum voltage monitor fall time for Channel 3.
toff_delay_3			12:0	0	Sets time delay between the start of V3's selected sequence position and pulling EN3 low.
TOFF_TIMERS_4_CMD	0x13	R/W	15:0	0
toff_max_4			15:13	0	Sets the maximum voltage monitor fall time for Channel 4.
toff_delay_4			12:0	0	Sets time delay between the start of V4's selected sequence position and pulling EN4 low.
TOFF_TIMERS_5_CMD	0x14	R/W	15:0	0
toff_max_5			15:13	0	Sets the maximum voltage monitor fall time for Channel 5.
toff_delay_5			12:0	0	Sets time delay between the start of V5's selected sequence position and pulling EN5 low.
TOFF_TIMERS_6_CMD	0x15	R/W	15:0	0
toff_max_6			15:13	0	Sets the maximum voltage monitor fall time for Channel 6.
toff_delay_6			12:0	0	Sets time delay between the start of V6's selected sequence position and pulling EN6 low.
SEQ_UP_POSITION_1_CMD	0x16	R/W	10:0	1
async_on_off_1			10	0	Ch.1 Asynchronous enable control. Bits 9:0 have to be 0 to use.
seq_up_position_1			9:0	1	Specifies sequence position for channel 1. Set to 0 to remove channel from sequencing.
SEQ_UP_POSITION_2_CMD	0x17	R/W	10:0	1
async_on_off_2			10	0	Ch.2 Asynchronous enable control. Bits 9:0 have to be 0 to use.
seq_up_position_2			9:0	1	Specifies sequence position for channel 2. Set to 0 to remove channel from sequencing.
SEQ_UP_POSITION_3_CMD	0x18	R/W	10:0	1
async_on_off_3			10	0	Ch.3 Asynchronous enable control. Bits 9:0 have to be 0 to use.
seq_up_position_3			9:0	1	Specifies sequence position for channel 3. Set to 0 to remove channel from sequencing.
SEQ_UP_POSITION_4_CMD	0x19	R/W	10:0	1
async_on_off_4			10	0	Ch.4 Asynchronous enable control. Bits 9:0 have to be 0 to use.
seq_up_position_4			9:0	1	Specifies sequence position for channel 4. Set to 0 to remove channel from sequencing.
SEQ_UP_POSITION_5_CMD	0x1A	R/W	10:0	1
async_on_off_5			10	0	Ch.5 Asynchronous enable control. Bits 9:0 have to be 0 to use.
seq_up_position_5			9:0	1	Specifies sequence position for channel 5. Set to 0 to remove channel from sequencing.
SEQ_UP_POSITION_6_CMD	0x1B	R/W	10:0	1
async_on_off_6			10	0	Ch.6 Asynchronous enable control. Bits 9:0 have to be 0 to use.
seq_up_position_6			9:0	1	Specifies sequence position for channel 6. Set to 0 to remove channel from sequencing.
SEQ_DOWN_POSITION_1_CMD	0x1C	R/W	10:0	1
active_pull_down_1			10	0	Voltage Monitor 1 active pull_down ON/OFF control.
seq_down_position_1			9:0	1	Specifies sequence down position for channel 1.
SEQ_DOWN_POSITION_2_CMD	0x1D	R/W	10:0	1
active_pull_down_2			10	0	Voltage Monitor 2 active pull_down ON/OFF control.
seq_down_position_2			9:0	1	Specifies sequence down position for channel 2.
SEQ_DOWN_POSITION_3_CMD	0x1E	R/W	10:0	1
active_pull_down_3			10	0	Voltage Monitor 3 active pull_down ON/OFF control.
seq_down_position_3			9:0	1	Specifies sequence down position for channel 3.
SEQ_DOWN_POSITION_4_CMD	0x1F	R/W	10:0	1
active_pull_down_4			10	0	Voltage Monitor 4 active pull_down ON/OFF control.
seq_down_position_4			9:0	1	Specifies sequence down position for channel 4.
SEQ_DOWN_POSITION_5_CMD	0x20	R/W	10:0	1
active_pull_down_5			10	0	Voltage Monitor 5 active pull_down ON/OFF control.
seq_down_position_5			9:0	1	Specifies sequence down position for channel 5.
SEQ_DOWN_POSITION_6_CMD	0x21	R/W	10:0	1
active_pull_down_6			10	0	Voltage Monitor 6 active pull_down ON/OFF control.
seq_down_position_6			9:0	1	Specifies sequence down position for channel 6.
RSTB_CONFIG_CMD	0x22	R/W	15:0	63
rstb_delay			15:13	0	Sets the RSTB assertion delay.
sv_fault_enable			12	0	Allows SUPERVISOR fault to pull FAULTB.
v6_ov_enable			11	0	Maps Channel 6 OV into RSTB output.
v5_ov_enable			10	0	Maps Channel 5 OV into RSTB output.
v4_ov_enable			9	0	Maps Channel 4 OV into RSTB output.
v3_ov_enable			8	0	Maps Channel 3 OV into RSTB output.
v2_ov_enable			7	0	Maps Channel 2 OV into RSTB output.
v1_ov_enable			6	0	Maps Channel 1 OV into RSTB output.
v6_uv_enable			5	1	Maps Channel 6 UV into RSTB output.
v5_uv_enable			4	1	Maps Channel 5 UV into RSTB output.
v4_uv_enable			3	1	Maps Channel 4 UV into RSTB output.
v3_uv_enable			2	1	Maps Channel 3 UV into RSTB output.
v2_uv_enable			1	1	Maps Channel 2 UV into RSTB output.
v1_uv_enable			0	1	Maps Channel 1 UV into RSTB output.
FAULT_RESPONSE_CMD	0x23	R/W	13:0	N/A
retry_count			13:11	N/A	Read the number of retries attempted.
faultb_state			10	N/A	Reports the Fault Pin state.
faultb_mask			9	0	Determines how device responds to external faults.
freeze			8	0	System Freeze Control. Refer to Presets for Values
retry_delay			7:5	0	Fault Retry Delay Settings.
fault_response_action			4:3	1	Fault response action.
retry_number			2:0	0	Automatic Retry count.
MONITOR_STATUS_HISTORY_CMD	0x26	R	15:0	N/A
sf_chan_hist			15:13	N/A	Reports the channel responsible for a sequence fault. If multiple channels fault, the lowest channel is reported.
sv_fault_status			12	N/A	Indicates the occurrence of a Supervisor fault.
v6_ov_sv_fault			11	N/A	V6 OV Supervisor Fault history.
v6_uv_sv_fault			10	N/A	V6 UV Supervisor Fault history.
v5_ov_sv_fault			9	N/A	V5 OV Supervisor Fault history.
v5_uv_sv_fault			8	N/A	V5 UV Supervisor Fault history.
v4_ov_sv_fault			7	N/A	V4 OV Supervisor Fault history.
v4_uv_sv_fault			6	N/A	V4 UV Supervisor Fault history.
v3_ov_sv_fault			5	N/A	V3 OV Supervisor Fault history.
v3_uv_sv_fault			4	N/A	V3 UV Supervisor Fault history.
v2_ov_sv_fault			3	N/A	V2 OV Supervisor Fault history.
v2_uv_sv_fault			2	N/A	V2 UV Supervisor Fault history.
v1_ov_sv_fault			1	N/A	V1 OV Supervisor Fault history.
v1_uv_sv_fault			0	N/A	V1 UV Supervisor Fault history.
CLEAR_ALERTB	0x28	R	15:0	N/A	Release the ALERTB pin.
STATUS_INFORMATION_CMD	0x29	R	15:0	N/A
sf_channel			15:13	N/A	Reports the channel responsible for a sequence fault. If multiple channels fault, the lowest channel is reported.
mb_state			12	N/A	Monitor Backup Status.
local_seq_status			11:10	N/A	Addressed Device Sequencing Status.
group_seq_status			9:8	N/A	Group Sequencing Status.
seq_up_fault			7	N/A	Maximum Turn_on time Fault.
seq_down_fault			6	N/A	Maximum Turn_off time Fault.
ov_fault			5	N/A	Supervisor fault by mapped OV channel.
uv_fault			4	N/A	Supervisor fault by mapped UV channel.
sv_fault			3	N/A	Supervisor Fault Status.
discharge			2	N/A	Sequenced channel group discharge status.
seq_control_fault			1	N/A	Control Fault Status.
other_fault			0	N/A	External or SHARE_CLK fault status.
BREAK_POINT_CMD	0x2A	R/W	10:0	0
bp_enable			10	0	Break Point Enable.
bp_value			9:0	0	Break Point Sequence Position Value.
SEQ_POSITION_COUNT_CMD	0x2B	R	10:0	N/A
sp_bp_test			10	N/A	Compare sp_count with bp_value.
sp_count			9:0	N/A	Sequence Position Count.
MONITOR_BACKUP_CMD	0x2F	R	15:0	N/A
bu_sf_chan			15:13	N/A	Reports the channel responsible for a sequence fault. If multiple channels fault, the lowest channel is reported.
bu_svf_state			12	N/A	Supervisor Fault status backup.
bu_v6_ov_sv_fault			11	N/A	V6 OV Supervisor Fault backup.
bu_v6_uv_sv_fault			10	N/A	V6 UV Supervisor Fault backup.
bu_v5_ov_sv_fault			9	N/A	V5 OV Supervisor Fault backup.
bu_v5_uv_sv_fault			8	N/A	V5 UV Supervisor Fault backup.
bu_v4_ov_sv_fault			7	N/A	V4 OV Supervisor Fault backup.
bu_v4_uv_sv_fault			6	N/A	V4 UV Supervisor Fault backup.
bu_v3_ov_sv_fault			5	N/A	V3 OV Supervisor Fault backup.
bu_v3_uv_sv_fault			4	N/A	V3 UV Supervisor Fault backup.
bu_v2_ov_sv_fault			3	N/A	V2 OV Supervisor Fault backup.
bu_v2_uv_sv_fault			2	N/A	V2 UV Supervisor Fault backup.
bu_v1_ov_sv_fault			1	N/A	V1 OV Supervisor Fault backup.
bu_v1_uv_sv_fault			0	N/A	V1 UV Supervisor Fault backup.
MONITOR_STATUS_CMD	0x30	R	13:0	N/A
margin_status			13	N/A	Logical representation of external margb input and/or i2c margin bit.
rstb_status			12	N/A	Status of the RSTB pin.
v6_ov_status			11	N/A	V6 OV comparator live status.
v6_uv_status			10	N/A	V6 UV comparator live status.
v5_ov_status			9	N/A	V5 OV comparator live status.
v5_uv_status			8	N/A	V5 UV comparator live status.
v4_ov_status			7	N/A	V4 OV comparator live status.
v4_uv_status			6	N/A	V4 UV comparator live status.
v3_ov_status			5	N/A	V3 OV comparator live status.
v3_uv_status			4	N/A	V3 UV comparator live status.
v2_ov_status			3	N/A	V2 OV comparator live status.
v2_uv_status			2	N/A	V2 UV comparator live status.
v1_ov_status			1	N/A	V1 OV comparator live status.
v1_uv_status			0	N/A	V1 UV comparator live status.
DEVICE_ID	0x31	R	15:0	N/A	Contents of DEVICE_ID = 0x2937

Expanded Table


WRITE_PROTECTION_CMD Address: 0x00 (R/W)
Contains lock key code and lock bit to prevent accidental changes.
	Bits [15:2]:	device_key (Default = 3754)
		Must match against programmed word to change lock bit.
		3754: DEFAULT
	Bit 1:	hw_lock_bit
		State of external WP Input. No register writes are possible when locked.
		0: UNLOCKED
		1: LOCKED
	Bit 0:	sw_lock_bit (Default = 1)
		Write lock bit. No register writes are possible when locked.
		0: UNLOCKED
		1: LOCKED

SPECIAL_LOT_CMD Address: 0x01 (R/W)

	Bits [15:0]:	SPECIAL_LOT (Default = 0)
		Returns two bytes indicating a factory special lot number. Users may over write the register with their own information.

ON_OFF_CONTROL_CMD Address: 0x02 (R/W)
Configures the combination of ON input and/or I2C inputs needed to control sequencing. Also, activates margin mode of operation.
	Bit 7:	on_state
		Internal ON status
		0: INTERNAL_ON_LOW
		1: INTERNAL_ON_HIGH
	Bit 6:	i2c_margin (Default = 0)
		RSTB disable
		0: RSTB_OPERATES_NORMALLY
		1: RSTB_PULLS_HIGH
	Bit 5:	discharge_start (Default = 0)
		Require or Not Require that all sequenced Voltage Monitor Channels are discharged below their thresholds before sequencing up.
		0: DISCHARGE_NOT_REQUIRED
		1: DISCHARGE_REQUIRED
	Bit 4:	i2c_on_off (Default = 0)
		Software/I2C controlled Sequencing.
		0: SEQUENCE_DOWN
		1: SEQUENCE_UP
	Bit 3:	i2c_on_off_mask (Default = 0)
		serial bus on_off control mask
		0: I2C_IGNORE
		1: I2C_LISTEN
	Bit 2:	on_input_mask (Default = 0)
		Determines how part responds to the ON input.
		0: ON_PIN_IGNORE
			part ignores the ON input
		1: ON_PIN_LISTEN
			part requires the ON input to sequence
	Bit 1:	on_polarity (Default = 0)
		Determines polarity of the ON Input. ACTIVEHIGH = Pull ON high to sequence up. ACTIVELOW = Pull ON low to sequence up.
		0: ACTIVE_HIGH
		1: ACTIVE_LOW
	Bit 0:	seq_down_qual (Default = 0)
		Selects Time or Event based Sequence Down.
		0: DISCHARGE_BASED
		1: TIME_BASED

V_RANGE_CMD Address: 0x03 (R/W)

	Bits [11:10]:	v6_range (Default = 0)
		Monitor range setting for Voltage Monitor 6.
		0: HIGH_RANGE
		1: LOW_RANGE
		2: POSITIVE_ADJUSTABLE
		3: NEGATIVE_ADJUSTABLE
	Bits [9:8]:	v5_range (Default = 0)
		Monitor range setting for Voltage Monitor 5.
		0: HIGH_RANGE
		1: LOW_RANGE
		2: POSITIVE_ADJUSTABLE
		3: NEGATIVE_ADJUSTABLE
	Bits [7:6]:	v4_range (Default = 1)
		Monitor range setting for Voltage Monitor 4.
		0: HIGH_RANGE
		1: LOW_RANGE
		2: POSITIVE_ADJUSTABLE
		3: NEGATIVE_ADJUSTABLE
	Bits [5:4]:	v3_range (Default = 1)
		Monitor range setting for Voltage Monitor 3.
		0: HIGH_RANGE
		1: LOW_RANGE
		2: POSITIVE_ADJUSTABLE
		3: NEGATIVE_ADJUSTABLE
	Bits [3:2]:	v2_range (Default = 1)
		Monitor range setting for Voltage Monitor 2.
		0: HIGH_RANGE
		1: LOW_RANGE
		2: POSITIVE_ADJUSTABLE
		3: NEGATIVE_ADJUSTABLE
	Bits [1:0]:	v1_range (Default = 1)
		Monitor range setting for Voltage Monitor 1.
		0: HIGH_RANGE
		1: LOW_RANGE
		2: POSITIVE_ADJUSTABLE
		3: NEGATIVE_ADJUSTABLE

V_THRESHOLD_1_CMD Address: 0x04 (R/W)

	Bits [15:8]:	ov_threshold_1 (Default = 87)
		Specify V1 OV Threshold.
	Bits [7:0]:	uv_threshold_1 (Default = 63)
		Specify V1 UV Threshold.

V_THRESHOLD_2_CMD Address: 0x05 (R/W)

	Bits [15:8]:	ov_threshold_2 (Default = 120)
		Specify V2 OV Threshold.
	Bits [7:0]:	uv_threshold_2 (Default = 90)
		Specify V2 UV Threshold.

V_THRESHOLD_3_CMD Address: 0x06 (R/W)

	Bits [15:8]:	ov_threshold_3 (Default = 153)
		Specify V3 OV Threshold.
	Bits [7:0]:	uv_threshold_3 (Default = 117)
		Specify V3 UV Threshold.

V_THRESHOLD_4_CMD Address: 0x07 (R/W)

	Bits [15:8]:	ov_threshold_4 (Default = 230)
		Specify V4 OV Threshold.
	Bits [7:0]:	uv_threshold_4 (Default = 180)
		Specify V4 UV Threshold.

V_THRESHOLD_5_CMD Address: 0x08 (R/W)

	Bits [15:8]:	ov_threshold_5 (Default = 137)
		Specify V5 OV Threshold..
	Bits [7:0]:	uv_threshold_5 (Default = 104)
		Specify V5 UV Threshold.

V_THRESHOLD_6_CMD Address: 0x09 (R/W)

	Bits [15:8]:	ov_threshold_6 (Default = 230)
		Specify V6 OV Threshold.
	Bits [7:0]:	uv_threshold_6 (Default = 180)
		Specify V6 UV Threshold.

TON_TIMERS_1_CMD Address: 0x0A (R/W)

	Bits [15:13]:	ton_max_1 (Default = 0)
		Sets the maximum voltage monitor rise time for Channel 1.
		0: INFINITY
		1: 160us
		2: 640us
		3: 2_6ms
		4: 10_2ms
		5: 41ms
		6: 164ms
		7: 655ms
	Bits [12:0]:	ton_delay_1 (Default = 0)
		Sets time delay between the start of V1's selected sequence position and the release of EN1.

TON_TIMERS_2_CMD Address: 0x0B (R/W)

	Bits [15:13]:	ton_max_2 (Default = 0)
		Sets the maximum voltage monitor rise time for Channel 2.
		0: INFINITY
		1: 160us
		2: 640us
		3: 2_6ms
		4: 10_2ms
		5: 41ms
		6: 164ms
		7: 655ms
	Bits [12:0]:	ton_delay_2 (Default = 0)
		Sets time delay between the start of V2's selected sequence position and the release of EN2.

TON_TIMERS_3_CMD Address: 0x0C (R/W)

	Bits [15:13]:	ton_max_3 (Default = 0)
		Sets the maximum voltage monitor rise time for Channel 3.
		0: INFINITY
		1: 160us
		2: 640us
		3: 2_6ms
		4: 10_2ms
		5: 41ms
		6: 164ms
		7: 655ms
	Bits [12:0]:	ton_delay_3 (Default = 0)
		Sets time delay between the start of V3's selected sequence position and the release of EN3.

TON_TIMERS_4_CMD Address: 0x0D (R/W)

	Bits [15:13]:	ton_max_4 (Default = 0)
		Sets the maximum voltage monitor rise time for Channel 4.
		0: INFINITY
		1: 160us
		2: 640us
		3: 2_6ms
		4: 10_2ms
		5: 41ms
		6: 164ms
		7: 655ms
	Bits [12:0]:	ton_delay_4 (Default = 0)
		Sets time delay between the start of V4's selected sequence position and the release of EN4.

TON_TIMERS_5_CMD Address: 0x0E (R/W)

	Bits [15:13]:	ton_max_5 (Default = 0)
		Sets the maximum voltage monitor rise time for Channel 5.
		0: INFINITY
		1: 160us
		2: 640us
		3: 2_6ms
		4: 10_2ms
		5: 41ms
		6: 164ms
		7: 655ms
	Bits [12:0]:	ton_delay_5 (Default = 0)
		Sets time delay between the start of V5's selected sequence position and the release of EN5.

TON_TIMERS_6_CMD Address: 0x0F (R/W)

	Bits [15:13]:	ton_max_6 (Default = 0)
		Sets the maximum voltage monitor rise time for Channel 6.
		0: INFINITY
		1: 160us
		2: 640us
		3: 2_6ms
		4: 10_2ms
		5: 41ms
		6: 164ms
		7: 655ms
	Bits [12:0]:	ton_delay_6 (Default = 0)
		Sets time delay between the start of V6's selected sequence position and the release of EN6.

TOFF_TIMERS_1_CMD Address: 0x10 (R/W)

	Bits [15:13]:	toff_max_1 (Default = 0)
		Sets the maximum voltage monitor fall time for Channel 1.
		0: INFINITY
		1: 2_6ms
		2: 10_2ms
		3: 41ms
		4: 164ms
		5: 655ms
		6: 2_6s
		7: 10_5s
	Bits [12:0]:	toff_delay_1 (Default = 0)
		Sets time delay between the start of V1's selected sequence position and pulling EN1 low.

TOFF_TIMERS_2_CMD Address: 0x11 (R/W)

	Bits [15:13]:	toff_max_2 (Default = 0)
		Sets the maximum voltage monitor fall time for Channel 2.
		0: INFINITY
		1: 2_6ms
		2: 10_2ms
		3: 41ms
		4: 164ms
		5: 655ms
		6: 2_6s
		7: 10_5s
	Bits [12:0]:	toff_delay_2 (Default = 0)
		Sets time delay between the start of V2's selected sequence position and pulling EN2 low.

TOFF_TIMERS_3_CMD Address: 0x12 (R/W)

	Bits [15:13]:	toff_max_3 (Default = 0)
		Sets the maximum voltage monitor fall time for Channel 3.
		0: INFINITY
		1: 2_6ms
		2: 10_2ms
		3: 41ms
		4: 164ms
		5: 655ms
		6: 2_6s
		7: 10_5s
	Bits [12:0]:	toff_delay_3 (Default = 0)
		Sets time delay between the start of V3's selected sequence position and pulling EN3 low.

TOFF_TIMERS_4_CMD Address: 0x13 (R/W)

	Bits [15:13]:	toff_max_4 (Default = 0)
		Sets the maximum voltage monitor fall time for Channel 4.
		0: INFINITY
		1: 2_6ms
		2: 10_2ms
		3: 41ms
		4: 164ms
		5: 655ms
		6: 2_6s
		7: 10_5s
	Bits [12:0]:	toff_delay_4 (Default = 0)
		Sets time delay between the start of V4's selected sequence position and pulling EN4 low.

TOFF_TIMERS_5_CMD Address: 0x14 (R/W)

	Bits [15:13]:	toff_max_5 (Default = 0)
		Sets the maximum voltage monitor fall time for Channel 5.
		0: INFINITY
		1: 2_6ms
		2: 10_2ms
		3: 41ms
		4: 164ms
		5: 655ms
		6: 2_6s
		7: 10_5s
	Bits [12:0]:	toff_delay_5 (Default = 0)
		Sets time delay between the start of V5's selected sequence position and pulling EN5 low.

TOFF_TIMERS_6_CMD Address: 0x15 (R/W)

	Bits [15:13]:	toff_max_6 (Default = 0)
		Sets the maximum voltage monitor fall time for Channel 6.
		0: INFINITY
		1: 2_6ms
		2: 10_2ms
		3: 41ms
		4: 164ms
		5: 655ms
		6: 2_6s
		7: 10_5s
	Bits [12:0]:	toff_delay_6 (Default = 0)
		Sets time delay between the start of V6's selected sequence position and pulling EN6 low.

SEQ_UP_POSITION_1_CMD Address: 0x16 (R/W)

	Bit 10:	async_on_off_1 (Default = 0)
		Ch.1 Asynchronous enable control. Bits 9:0 have to be 0 to use.
		0: HOLD_EN1_LOW
		1: RELEASE_EN1
	Bits [9:0]:	seq_up_position_1 (Default = 1)
		Specifies sequence position for channel 1. Set to 0 to remove channel from sequencing.

SEQ_UP_POSITION_2_CMD Address: 0x17 (R/W)

	Bit 10:	async_on_off_2 (Default = 0)
		Ch.2 Asynchronous enable control. Bits 9:0 have to be 0 to use.
		0: HOLD_EN2_LOW
		1: RELEASE_EN2
	Bits [9:0]:	seq_up_position_2 (Default = 1)
		Specifies sequence position for channel 2. Set to 0 to remove channel from sequencing.

SEQ_UP_POSITION_3_CMD Address: 0x18 (R/W)

	Bit 10:	async_on_off_3 (Default = 0)
		Ch.3 Asynchronous enable control. Bits 9:0 have to be 0 to use.
		0: HOLD_EN3_LOW
		1: RELEASE_EN3
	Bits [9:0]:	seq_up_position_3 (Default = 1)
		Specifies sequence position for channel 3. Set to 0 to remove channel from sequencing.

SEQ_UP_POSITION_4_CMD Address: 0x19 (R/W)

	Bit 10:	async_on_off_4 (Default = 0)
		Ch.4 Asynchronous enable control. Bits 9:0 have to be 0 to use.
		0: HOLD_EN4_LOW
		1: RELEASE_EN4
	Bits [9:0]:	seq_up_position_4 (Default = 1)
		Specifies sequence position for channel 4. Set to 0 to remove channel from sequencing.

SEQ_UP_POSITION_5_CMD Address: 0x1A (R/W)

	Bit 10:	async_on_off_5 (Default = 0)
		Ch.5 Asynchronous enable control. Bits 9:0 have to be 0 to use.
		0: HOLD_EN5_LOW
		1: RELEASE_EN5
	Bits [9:0]:	seq_up_position_5 (Default = 1)
		Specifies sequence position for channel 5. Set to 0 to remove channel from sequencing.

SEQ_UP_POSITION_6_CMD Address: 0x1B (R/W)

	Bit 10:	async_on_off_6 (Default = 0)
		Ch.6 Asynchronous enable control. Bits 9:0 have to be 0 to use.
		0: HOLD_EN6_LOW
		1: RELEASE_EN6
	Bits [9:0]:	seq_up_position_6 (Default = 1)
		Specifies sequence position for channel 6. Set to 0 to remove channel from sequencing.

SEQ_DOWN_POSITION_1_CMD Address: 0x1C (R/W)

	Bit 10:	active_pull_down_1 (Default = 0)
		Voltage Monitor 1 active pull_down ON/OFF control.
		0: PULL_DOWN_DISABLED
		1: PULL_DOWN_ENABLED
	Bits [9:0]:	seq_down_position_1 (Default = 1)
		Specifies sequence down position for channel 1.

SEQ_DOWN_POSITION_2_CMD Address: 0x1D (R/W)

	Bit 10:	active_pull_down_2 (Default = 0)
		Voltage Monitor 2 active pull_down ON/OFF control.
		0: PULL_DOWN_DISABLED
		1: PULL_DOWN_ENABLED
	Bits [9:0]:	seq_down_position_2 (Default = 1)
		Specifies sequence down position for channel 2.

SEQ_DOWN_POSITION_3_CMD Address: 0x1E (R/W)

	Bit 10:	active_pull_down_3 (Default = 0)
		Voltage Monitor 3 active pull_down ON/OFF control.
		0: PULL_DOWN_DISABLED
		1: PULL_DOWN_ENABLED
	Bits [9:0]:	seq_down_position_3 (Default = 1)
		Specifies sequence down position for channel 3.

SEQ_DOWN_POSITION_4_CMD Address: 0x1F (R/W)

	Bit 10:	active_pull_down_4 (Default = 0)
		Voltage Monitor 4 active pull_down ON/OFF control.
		0: PULL_DOWN_DISABLED
		1: PULL_DOWN_ENABLED
	Bits [9:0]:	seq_down_position_4 (Default = 1)
		Specifies sequence down position for channel 4.

SEQ_DOWN_POSITION_5_CMD Address: 0x20 (R/W)

	Bit 10:	active_pull_down_5 (Default = 0)
		Voltage Monitor 5 active pull_down ON/OFF control.
		0: PULL_DOWN_DISABLED
		1: PULL_DOWN_ENABLED
	Bits [9:0]:	seq_down_position_5 (Default = 1)
		Specifies sequence down position for channel 5.

SEQ_DOWN_POSITION_6_CMD Address: 0x21 (R/W)

	Bit 10:	active_pull_down_6 (Default = 0)
		Voltage Monitor 6 active pull_down ON/OFF control.
		0: PULL_DOWN_DISABLED
		1: PULL_DOWN_ENABLED
	Bits [9:0]:	seq_down_position_6 (Default = 1)
		Specifies sequence down position for channel 6.

RSTB_CONFIG_CMD Address: 0x22 (R/W)

	Bits [15:13]:	rstb_delay (Default = 0)
		Sets the RSTB assertion delay.
		0: 0_05ms
		1: 1_6ms
		2: 6_4ms
		3: 26ms
		4: 51ms
		5: 200ms
		6: 410ms
		7: 1640ms
	Bit 12:	sv_fault_enable (Default = 0)
		Allows SUPERVISOR fault to pull FAULTB.
		0: SUPERVISOR_FAULT_DOES_NOT_PULL_FAULTB
		1: SUPERVISOR_FAULT_PULLS_FAULTB
	Bit 11:	v6_ov_enable (Default = 0)
		Maps Channel 6 OV into RSTB output.
		0: NOT_ENABLED
	Bit 10:	v5_ov_enable (Default = 0)
		Maps Channel 5 OV into RSTB output.
		0: NOT_ENABLED
	Bit 9:	v4_ov_enable (Default = 0)
		Maps Channel 4 OV into RSTB output.
		0: NOT_ENABLED
	Bit 8:	v3_ov_enable (Default = 0)
		Maps Channel 3 OV into RSTB output.
		0: NOT_ENABLED
	Bit 7:	v2_ov_enable (Default = 0)
		Maps Channel 2 OV into RSTB output.
		0: NOT_ENABLED
	Bit 6:	v1_ov_enable (Default = 0)
		Maps Channel 1 OV into RSTB output.
		0: NOT_ENABLED
	Bit 5:	v6_uv_enable (Default = 1)
		Maps Channel 6 UV into RSTB output.
		0: NOT_ENABLED
	Bit 4:	v5_uv_enable (Default = 1)
		Maps Channel 5 UV into RSTB output.
		0: NOT_ENABLED
	Bit 3:	v4_uv_enable (Default = 1)
		Maps Channel 4 UV into RSTB output.
		0: NOT_ENABLED
	Bit 2:	v3_uv_enable (Default = 1)
		Maps Channel 3 UV into RSTB output.
		0: NOT_ENABLED
	Bit 1:	v2_uv_enable (Default = 1)
		Maps Channel 2 UV into RSTB output.
		0: NOT_ENABLED
	Bit 0:	v1_uv_enable (Default = 1)
		Maps Channel 1 UV into RSTB output.
		0: NOT_ENABLED

FAULT_RESPONSE_CMD Address: 0x23 (R/W)

	Bits [13:11]:	retry_count
		Read the number of retries attempted.
		7: UNDEFINED
	Bit 10:	faultb_state
		Reports the Fault Pin state.
		1: HIGH
		0: LOW
	Bit 9:	faultb_mask (Default = 0)
		Determines how device responds to external faults.
		0: IGNORE_EXTERNAL_FAULTB_PULLDOWN
		1: RESPOND_TO_EXTERNAL_FAULTB_PULLDOWN
	Bit 8:	freeze (Default = 0)
		System Freeze Control. Refer to Presets for Values
		0: DO_NOT_FREEZE_ON_FAULT
		1: FREEZE_DEVICE_STATE_ON_FAULT
	Bits [7:5]:	retry_delay (Default = 0)
		Fault Retry Delay Settings.
		0: 0_05ms
		1: 200ms
		2: 410ms
		3: 820ms
		4: 1_64s
		5: 3_28s
		6: 6_55s
		7: 13_1s
	Bits [4:3]:	fault_response_action (Default = 1)
		Fault response action.
		0: CONTINUE_OPERATION
		1: DISCHARGED_RETRY
		2: DELAYED_RETRY
		3: DISCHARGE_AND_DELAY_RETRY
	Bits [2:0]:	retry_number (Default = 0)
		Automatic Retry count.
		0: DO_NOT_ATTEMPT_TO_RETRY
		1: RETRY_1_TIMES
		2: RETRY_2_TIMES
		3: RETRY_3_TIMES
		4: RETRY_4_TIMES
		5: RETRY_5_TIMES
		6: RETRY_6_TIMES
		7: UNLIMITED_RETRIES

MONITOR_STATUS_HISTORY_CMD Address: 0x26 (R)

	Bits [15:13]:	sf_chan_hist
		Reports the channel responsible for a sequence fault. If multiple channels fault, the lowest channel is reported.
		0: NONE
		1: V1
		2: V2
		3: V3
		4: V4
		5: V5
		6: V6
		7: UNDEFINED
	Bit 12:	sv_fault_status
		Indicates the occurrence of a Supervisor fault.
		0: SUPERVISOR_FAULT_HAS_NOT_OCCURRED
		1: SUPERVISOR_FAULT_HAS_OCCURRED
	Bit 11:	v6_ov_sv_fault
		V6 OV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 10:	v6_uv_sv_fault
		V6 UV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 9:	v5_ov_sv_fault
		V5 OV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 8:	v5_uv_sv_fault
		V5 UV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 7:	v4_ov_sv_fault
		V4 OV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 6:	v4_uv_sv_fault
		V4 UV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 5:	v3_ov_sv_fault
		V3 OV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 4:	v3_uv_sv_fault
		V3 UV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 3:	v2_ov_sv_fault
		V2 OV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 2:	v2_uv_sv_fault
		V2 UV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 1:	v1_ov_sv_fault
		V1 OV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 0:	v1_uv_sv_fault
		V1 UV Supervisor Fault history.
		0: NO_FAULT
		1: FAULT_OCCURRED

CLEAR_ALERTB_CMD Address: 0x28 (R)

	Bits [15:0]:	CLEAR_ALERTB
		Release the ALERTB pin.

STATUS_INFORMATION_CMD Address: 0x29 (R)

	Bits [15:13]:	sf_channel
		Reports the channel responsible for a sequence fault. If multiple channels fault, the lowest channel is reported.
		0: NONE
		1: V1
		2: V2
		3: V3
		4: V4
		5: V5
		6: V6
		7: UNDEFINED
	Bit 12:	mb_state
		Monitor Backup Status.
		0: EMPTY
		1: WRITTEN
	Bits [11:10]:	local_seq_status
		Addressed Device Sequencing Status.
		0: SEQUENCE_DOWN_DONE
		1: SEQUENCE_UP_IN_PROGRESS
		2: SEQUENCE_DOWN_IN_PROGRESS
		3: SEQUENCE_UP_DONE
	Bits [9:8]:	group_seq_status
		Group Sequencing Status.
		0: SEQUENCE_DOWN_DONE
		1: SEQUENCE_UP_IN_PROGRESS
		2: SEQUENCE_DOWN_IN_PROGRESS
		3: SEQUENCE_UP_DONE
	Bit 7:	seq_up_fault
		Maximum Turn_on time Fault.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 6:	seq_down_fault
		Maximum Turn_off time Fault.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 5:	ov_fault
		Supervisor fault by mapped OV channel.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 4:	uv_fault
		Supervisor fault by mapped UV channel.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 3:	sv_fault
		Supervisor Fault Status.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 2:	discharge
		Sequenced channel group discharge status.
		0: ONE_OR_MORE_SEQUENCED_CHANNELS_NOT_DISCHARGED
		1: ALL_SEQUENCED_CHANNELS_ARE_BELOW_DISCHARGE_THRESHOLDS
	Bit 1:	seq_control_fault
		Control Fault Status.
		0: NO_FAULT
		1: FAULT
	Bit 0:	other_fault
		External or SHARE_CLK fault status.
		0: NO_FAULT
		1: FAULT_OCCURRED

BREAK_POINT_CMD Address: 0x2A (R/W)

	Bit 10:	bp_enable (Default = 0)
		Break Point Enable.
		0: BREAK_POINT_NOT_ENABLED
		1: BREAK_POINT_ENABLED
	Bits [9:0]:	bp_value (Default = 0)
		Break Point Sequence Position Value.

SEQ_POSITION_COUNT_CMD Address: 0x2B (R)

	Bit 10:	sp_bp_test
		Compare sp_count with bp_value.
		0: NOT_EQUAL
		1: EQUAL
	Bits [9:0]:	sp_count
		Sequence Position Count.

MONITOR_BACKUP_CMD Address: 0x2F (R)

	Bits [15:13]:	bu_sf_chan
		Reports the channel responsible for a sequence fault. If multiple channels fault, the lowest channel is reported.
		0: NONE
		1: V1
		2: V2
		3: V3
		4: V4
		5: V5
		6: V6
		7: UNDEFINED
	Bit 12:	bu_svf_state
		Supervisor Fault status backup.
		0: SUPERVISOR_FAULT_HAS_NOT_OCCURRED
		1: SUPERVISOR_FAULT_HAS_OCCURRED
	Bit 11:	bu_v6_ov_sv_fault
		V6 OV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 10:	bu_v6_uv_sv_fault
		V6 UV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 9:	bu_v5_ov_sv_fault
		V5 OV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 8:	bu_v5_uv_sv_fault
		V5 UV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 7:	bu_v4_ov_sv_fault
		V4 OV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 6:	bu_v4_uv_sv_fault
		V4 UV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 5:	bu_v3_ov_sv_fault
		V3 OV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 4:	bu_v3_uv_sv_fault
		V3 UV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 3:	bu_v2_ov_sv_fault
		V2 OV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 2:	bu_v2_uv_sv_fault
		V2 UV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 1:	bu_v1_ov_sv_fault
		V1 OV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED
	Bit 0:	bu_v1_uv_sv_fault
		V1 UV Supervisor Fault backup.
		0: NO_FAULT
		1: FAULT_OCCURRED

MONITOR_STATUS_CMD Address: 0x30 (R)

	Bit 13:	margin_status
		Logical representation of external margb input and/or i2c margin bit.
		0: MARGIN_FUNCTION_INACTIVE
		1: MARGIN_FUNCTION_ACTIVE
	Bit 12:	rstb_status
		Status of the RSTB pin.
		0: RSTB_IS_HIGH
		1: RSTB_IS_LOW
	Bit 11:	v6_ov_status
		V6 OV comparator live status.
		0: NO_VIOLATION
		1: HIGH_LIMIT_VIOLATION
	Bit 10:	v6_uv_status
		V6 UV comparator live status.
		0: NO_VIOLATION
		1: LOW_LIMIT_VIOLATION
	Bit 9:	v5_ov_status
		V5 OV comparator live status.
		0: NO_VIOLATION
		1: HIGH_LIMIT_VIOLATION
	Bit 8:	v5_uv_status
		V5 UV comparator live status.
		0: NO_VIOLATION
		1: LOW_LIMIT_VIOLATION
	Bit 7:	v4_ov_status
		V4 OV comparator live status.
		0: NO_VIOLATION
		1: HIGH_LIMIT_VIOLATION
	Bit 6:	v4_uv_status
		V4 UV comparator live status.
		0: NO_VIOLATION
		1: LOW_LIMIT_VIOLATION
	Bit 5:	v3_ov_status
		V3 OV comparator live status.
		0: NO_VIOLATION
		1: HIGH_LIMIT_VIOLATION
	Bit 4:	v3_uv_status
		V3 UV comparator live status.
		0: NO_VIOLATION
		1: LOW_LIMIT_VIOLATION
	Bit 3:	v2_ov_status
		V2 OV comparator live status.
		0: NO_VIOLATION
		1: HIGH_LIMIT_VIOLATION
	Bit 2:	v2_uv_status
		V2 UV comparator live status.
		0: NO_VIOLATION
		1: LOW_LIMIT_VIOLATION
	Bit 1:	v1_ov_status
		V1 OV comparator live status.
		0: NO_VIOLATION
		1: HIGH_LIMIT_VIOLATION
	Bit 0:	v1_uv_status
		V1 UV comparator live status.
		0: NO_VIOLATION
		1: LOW_LIMIT_VIOLATION

DEVICE_ID_CMD Address: 0x31 (R)

	Bits [15:0]:	DEVICE_ID
		Contents of DEVICE_ID = 0x2937