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DC2100A
1.2.0
Bi-Directional Cell Balancer Using the LTC3300-1 and the LTC6804-2
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API Header File for LTC3300-1 High Efficiency Bidirectional Multicell Battery Balancer. More...
Go to the source code of this file.
API Header File for LTC3300-1 High Efficiency Bidirectional Multicell Battery Balancer.
Definition in file LTC3300-1.h.
Functions | |
void | LTC3300_Init (void) |
Initializes the LTC3300-1 code module. More... | |
void | LTC3300_Command_Write (int8 board_num, int8 *balancer_command_ptr) |
Writes the balancer control bits for a number of cells controlled by a chain of LTC3300-1 ICs at a specific logical address. More... | |
BOOLEAN | LTC3300_Command_Read (int8 board_num, int8 *balancer_command_ptr) |
Reads the balancer control bits for a number of cells controlled by a chain of LTC3300-1 ICs at a specific logical address. More... | |
BOOLEAN | LTC3300_Status_Read (int8 board_num, int8 *gate_drive_ok, int8 *cells_ov_ok, int8 *stack_ov_ok, int8 *temp_ok) |
Reads the status bits for a chain of LTC3300-1 ICs at a specific logical address. More... | |
void | LTC3300_Execute (int8 board_num) |
Commands a chain of LTC3300s at a specific logical address to execute their balance commands. More... | |
void | LTC3300_Suspend (int8 board_num) |
Commands a chain of LTC3300s at a specific logical address to suspend their balance commands. More... | |
void | LTC3300_Watchdog_Kick (void) |
Sends a benign command to all chains of LTC3300s at all logical addresses to reset their watchdog timers. More... | |
void | LTC3300_Raw_Write (int8 board_num, int8 *ltc3300_data, int8 num_bytes) |
Sends a raw string of bytes to a chain of LTC3300s at a specific logical address. More... | |
void | LTC3300_Raw_Read (int8 board_num, int8 *ltc3300_data, int8 num_bytes) |
Receives a raw string of bytes from a chain of LTC3300s at a specific logical address. More... | |
Macros | |
LTC3300-1 Driver Properties | |
#define | LTC3300_NUM_CELLS 6 |
Number of cells controlled by one LTC3300. More... | |
#define | LTC3300_TWD1 750 |
in ms, min Watchdog Timer Timeout Period WDT Assertion Measured from Last Valid Command Byte (from datasheet page 5) More... | |
#define | LTC3300_V_SUPPLY_VOLTAGE 6500 |
mV per bit, Minimum supply voltage to ensure LTC3300s can communicate. More... | |
Balancer Control Codes | |
Bit definitions for control codes written to LTC3300 Balance Control Registers. Balancer Control Codes specified in datasheet Table 5 | |
#define | LTC3300_BALANCER_CONTROL_CODE_NONE 0x0 |
Balancing Action: None. More... | |
#define | LTC3300_BALANCER_CONTROL_CODE_DISCHARGE_NONSYNC 0x1 |
Balancing Action: Discharge Cell n (Nonsynchronous) More... | |
#define | LTC3300_BALANCER_CONTROL_CODE_DISCHARGE_SYNC 0x2 |
Balancing Action: Discharge Cell n (Synchronous) More... | |
#define | LTC3300_BALANCER_CONTROL_CODE_CHARGE 0x3 |
Balancing Action: Charge Cell n. More... | |
#define | LTC3300_BALANCER_NUM_CONTROL_CODES 0x4 |
Number of Balancing Actions. More... | |
BOOLEAN LTC3300_Command_Read | ( | int8 | board_num, |
int8 * | balancer_command_ptr | ||
) |
Reads the balancer control bits for a number of cells controlled by a chain of LTC3300-1 ICs at a specific logical address.
Number of ICs in chain is set at compile time by LTC3300_CONFIG_NUM_ICS_PER_ADDRESS. Number of cells controlled by chain = LTC3300_CONFIG_NUM_ICS_PER_ADDRESS * LTC3300_NUM_CELLS.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
balancer_command_ptr | Pointer to array where Balancer Control Bits read from LTC3300-1 Balancer Command Registers are to be returned. |
Definition at line 194 of file LTC3300-1.c.
void LTC3300_Command_Write | ( | int8 | board_num, |
int8 * | balancer_command_ptr | ||
) |
Writes the balancer control bits for a number of cells controlled by a chain of LTC3300-1 ICs at a specific logical address.
Number of ICs in chain is set at compile time by LTC3300_CONFIG_NUM_ICS_PER_ADDRESS. Number of cells controlled by chain = LTC3300_CONFIG_NUM_ICS_PER_ADDRESS * LTC3300_NUM_CELLS.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
balancer_command_ptr | Pointer to array of Balancer Control Bits to write to LTC3300-1 Balancer Command Registers. |
Definition at line 151 of file LTC3300-1.c.
void LTC3300_Execute | ( | int8 | board_num | ) |
Commands a chain of LTC3300s at a specific logical address to execute their balance commands.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
Definition at line 320 of file LTC3300-1.c.
void LTC3300_Init | ( | void | ) |
void LTC3300_Raw_Read | ( | int8 | board_num, |
int8 * | ltc3300_data, | ||
int8 | num_bytes | ||
) |
Receives a raw string of bytes from a chain of LTC3300s at a specific logical address.
This function is configured by the num_bytes parameter instead of LTC3300_CONFIG_NUM_ICS_PER_ADDRESS. It is not recommended to use this function. It primarily exists for the DC2100A GUI to display the raw communication to/from the LTC3300s.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
ltc3300_data | Pointer to where the raw bytes read from the chain of LTC3300-1 ICs should be stored. |
num_bytes | The number of raw bytes to read from the chain of LTC3300-1 ICs. |
Definition at line 373 of file LTC3300-1.c.
void LTC3300_Raw_Write | ( | int8 | board_num, |
int8 * | ltc3300_data, | ||
int8 | num_bytes | ||
) |
Sends a raw string of bytes to a chain of LTC3300s at a specific logical address.
This function is configured by the num_bytes parameter instead of LTC3300_CONFIG_NUM_ICS_PER_ADDRESS. It is not recommended to use this function. It primarily exists for the DC2100A GUI to display the raw communication to/from the LTC3300s.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
ltc3300_data | Pointer to the raw bytes to send to the chain of LTC3300-1 ICs. |
num_bytes | The number of raw bytes to send to the chain of LTC3300-1 ICs. |
Definition at line 364 of file LTC3300-1.c.
BOOLEAN LTC3300_Status_Read | ( | int8 | board_num, |
int8 * | gate_drive_ok, | ||
int8 * | cells_ov_ok, | ||
int8 * | stack_ov_ok, | ||
int8 * | temp_ok | ||
) |
Reads the status bits for a chain of LTC3300-1 ICs at a specific logical address.
Number of ICs in chain is set at compile time by LTC3300_CONFIG_NUM_ICS_PER_ADDRESS.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
gate_drive_ok | Pointer to array where Gate Drive OK bits read from LTC3300-1 Status Registers are to be returned. |
cells_ov_ok | Pointer to array where Cells Overvoltage OK bits read from LTC3300-1 Status Registers are to be returned. |
stack_ov_ok | Pointer to array where Stack Overvoltage OK bits read from LTC3300-1 Status Registers are to be returned. |
temp_ok | Pointer to array where Temperature OK bits read from LTC3300-1 Status Registers are to be returned. |
Definition at line 253 of file LTC3300-1.c.
void LTC3300_Suspend | ( | int8 | board_num | ) |
Commands a chain of LTC3300s at a specific logical address to suspend their balance commands.
board_num | The logical address for the PCB containing these LTC3300-1 ICs. |
Definition at line 335 of file LTC3300-1.c.
void LTC3300_Watchdog_Kick | ( | void | ) |
Sends a benign command to all chains of LTC3300s at all logical addresses to reset their watchdog timers.
Uses the Read Status command as a benign command that resets the watchdog in the LTC3300 without resulting in a balancing action.
Definition at line 350 of file LTC3300-1.c.
#define LTC3300_BALANCER_CONTROL_CODE_CHARGE 0x3 |
Balancing Action: Charge Cell n.
Definition at line 98 of file LTC3300-1.h.
#define LTC3300_BALANCER_CONTROL_CODE_DISCHARGE_NONSYNC 0x1 |
Balancing Action: Discharge Cell n (Nonsynchronous)
Definition at line 96 of file LTC3300-1.h.
#define LTC3300_BALANCER_CONTROL_CODE_DISCHARGE_SYNC 0x2 |
Balancing Action: Discharge Cell n (Synchronous)
Definition at line 97 of file LTC3300-1.h.
#define LTC3300_BALANCER_CONTROL_CODE_NONE 0x0 |
Balancing Action: None.
Definition at line 95 of file LTC3300-1.h.
#define LTC3300_BALANCER_NUM_CONTROL_CODES 0x4 |
Number of Balancing Actions.
Definition at line 99 of file LTC3300-1.h.
#define LTC3300_NUM_CELLS 6 |
Number of cells controlled by one LTC3300.
Definition at line 85 of file LTC3300-1.h.
#define LTC3300_TWD1 750 |
in ms, min Watchdog Timer Timeout Period WDT Assertion Measured from Last Valid Command Byte (from datasheet page 5)
Definition at line 86 of file LTC3300-1.h.
#define LTC3300_V_SUPPLY_VOLTAGE 6500 |
mV per bit, Minimum supply voltage to ensure LTC3300s can communicate.
Definition at line 87 of file LTC3300-1.h.