84 #define LTC2874_CS QUIKEVAL_CS 101 #define LTC2874_READ 0x00 102 #define LTC2874_WRITE_NO_UPDATE 0x20
103 #define LTC2874_UPDATE_ALL 0x40
104 #define LTC2874_WRITE_UPDATE_ALL 0x60
105 #define LTC2874_RESET 0xE0
132 #define LTC2874_IRQREG_REG0 0x00 133 #define LTC2874_IRQMASK_REG1 0x01 134 #define LTC2874_EVENT1_REG2 0x02 135 #define LTC2874_EVENT2_REG3 0x03 136 #define LTC2874_EVENT3_REG4 0x04 137 #define LTC2874_EVENT4_REG5 0x05 138 #define LTC2874_STATUS1_REG6 0x06 139 #define LTC2874_STATUS2_REG7 0x07 140 #define LTC2874_MODE1_REG8 0x08 141 #define LTC2874_MODE2_REG9 0x09 142 #define LTC2874_NSF_REGA 0x0A 143 #define LTC2874_ILLM_REGB 0x0B 144 #define LTC2874_TMRCTRL_REGC 0x0C 145 #define LTC2874_CTRL1_REGD 0x0D 146 #define LTC2874_CTRL2_REGE 0x0E 153 #define LTC2874_OT (0x1<<7) // REGISTER IRQREG 154 #define LTC2874_SUPPLY (0x1<<6) // REGISTER IRQREG 155 #define LTC2874_WU (0x1<<5) // REGISTER IRQREG 156 #define LTC2874_TOC_LP (0x1<<4) // REGISTER IRQREG 157 #define LTC2874_PWRCHNG (0x1<<3) // REGISTER IRQREG 158 #define LTC2874_TOC_CQ (0x1<<2) // REGISTER IRQREG 159 #define LTC2874_CSENSE (0x1<<1) // REGISTER IRQREG 161 #define LTC2874_OT_MASK (0x1<<7) // REGISTER IRQMASK 162 #define LTC2874_SUPPLY_MASK (0x1<<6) // REGISTER IRQMASK 163 #define LTC2874_WU_MASK (0x1<<5) // REGISTER IRQMASK 164 #define LTC2874_TOC_LP_MASK (0x1<<4) // REGISTER IRQMASK 165 #define LTC2874_PWRCHNG_MASK (0x1<<3) // REGISTER IRQMASK 166 #define LTC2874_TOC_CQ_MASK (0x1<<2) // REGISTER IRQMASK 167 #define LTC2874_CSENSE_MASK (0x1<<1) // REGISTER IRQMASK 169 #define LTC2874_OT_SD (0x1<<7) // REGISTER EVENT1 170 #define LTC2874_OT_WARN (0x1<<6) // REGISTER EVENT1 171 #define LTC2874_UVLO_VL (0x1<<4) // REGISTER EVENT1 172 #define LTC2874_UVLO_VDD (0x1<<3) // REGISTER EVENT1 173 #define LTC2874_UV_VDD (0x1<<2) // REGISTER EVENT1 174 #define LTC2874_OV_VDD (0x1<<1) // REGISTER EVENT1 176 #define LTC2874_WU4 (0x1<<7) // REGISTER EVENT2 177 #define LTC2874_WU3 (0x1<<6) // REGISTER EVENT2 178 #define LTC2874_WU2 (0x1<<5) // REGISTER EVENT2 179 #define LTC2874_WU1 (0x1<<4) // REGISTER EVENT2 180 #define LTC2874_TOC_LP4 (0x1<<3) // REGISTER EVENT2 181 #define LTC2874_TOC_LP3 (0x1<<2) // REGISTER EVENT2 182 #define LTC2874_TOC_LP2 (0x1<<1) // REGISTER EVENT2 183 #define LTC2874_TOC_LP1 0x1 // REGISTER EVENT2 185 #define LTC2874_PWRCHNG4 (0x1<<7) // REGISTER EVENT3 186 #define LTC2874_PWRCHNG3 (0x1<<6) // REGISTER EVENT3 187 #define LTC2874_PWRCHNG2 (0x1<<5) // REGISTER EVENT3 188 #define LTC2874_PWRCHNG1 (0x1<<4) // REGISTER EVENT3 189 #define LTC2874_TOC_CQ4 (0x1<<3) // REGISTER EVENT3 190 #define LTC2874_TOC_CQ3 (0x1<<2) // REGISTER EVENT3 191 #define LTC2874_TOC_CQ2 (0x1<<1) // REGISTER EVENT3 192 #define LTC2874_TOC_CQ1 0x1 // REGISTER EVENT3 194 #define LTC2874_CQ_SNS4 (0x1<<7) // REGISTER EVENT4 195 #define LTC2874_CQ_SNS3 (0x1<<6) // REGISTER EVENT4 196 #define LTC2874_CQ_SNS2 (0x1<<5) // REGISTER EVENT4 197 #define LTC2874_CQ_SNS1 (0x1<<4) // REGISTER EVENT4 198 #define LTC2874_CSENSE4 (0x1<<3) // REGISTER EVENT4 199 #define LTC2874_CSENSE3 (0x1<<2) // REGISTER EVENT4 200 #define LTC2874_CSENSE2 (0x1<<1) // REGISTER EVENT4 201 #define LTC2874_CSENSE1 0x1 // REGISTER EVENT4 203 #define LTC2874_OT_STAT (0x1<<7) // REGISTER STATUS1 204 #define LTC2874_WU_COOL_STAT (0x1<<6) // REGISTER STATUS1 205 #define LTC2874_UVLO_VDD_STAT (0x1<<5) // REGISTER STATUS1 206 #define LTC2874_OV_VDD_STAT (0x1<<4) // REGISTER STATUS1 207 #define LTC2874_OC_LP4_STAT (0x1<<3) // REGISTER STATUS1 208 #define LTC2874_OC_LP3_STAT (0x1<<2) // REGISTER STATUS1 209 #define LTC2874_OC_LP2_STAT (0x1<<1) // REGISTER STATUS1 210 #define LTC2874_OC_LP1_STAT 0x1 // REGISTER STATUS1 212 #define LTC2874_PWRGD4 (0x1<<7) // REGISTER STATUS2 213 #define LTC2874_PWRGD3 (0x1<<6) // REGISTER STATUS2 214 #define LTC2874_PWRGD2 (0x1<<5) // REGISTER STATUS2 215 #define LTC2874_PWRGD1 (0x1<<4) // REGISTER STATUS2 216 #define LTC2874_OC_CQ4 (0x1<<3) // REGISTER STATUS2 217 #define LTC2874_OC_CQ3 (0x1<<2) // REGISTER STATUS2 218 #define LTC2874_OC_CQ2 (0x1<<1) // REGISTER STATUS2 219 #define LTC2874_OC_OQ1 0x1 // REGISTER STATUS2 221 #define LTC2874_24VMODE (0x1<<7) // REGISTER MODE1 222 #define LTC2874_CSENSE_MODE (0x1<<6) // REGISTER MODE1 224 #define LTC2874_2XPTC_pos 4 // REGISTER MODE1 225 #define LTC2874_2XPTC_msk (0x3<<4) // REGISTER MODE1 226 #define LTC2874_2XPTC(value) (LTC2874_2XPTC_msk & ((value) << LTC2874_2XPTC_pos)) 228 #define LTC2874_FLDBK_MODE (0x1<<3) // REGISTER MODE1 229 #define LTC2874_RETRY_OV (0x1<<2) // REGISTER MODE1 230 #define LTC2874_RETRY_LP (0x1<<1) // REGISTER MODE1 231 #define LTC2874_RETRY_CQ 0x1 // REGISTER MODE1 233 #define LTC2874_SLEW4 (0x1<<7) // REGISTER MODE2 234 #define LTC2874_SLEW3 (0x1<<6) // REGISTER MODE2 235 #define LTC2874_SLEW2 (0x1<<5) // REGISTER MODE2 236 #define LTC2874_SLEW1 (0x1<<4) // REGISTER MODE2 238 #define LTC2874_OV_TH_pos 2 // REGISTER MODE2 239 #define LTC2874_OV_TH_msk (0x3<<2) // REGISTER MODE2 240 #define LTC2874_OV_TH(value) (LTC2874_OV_TH_msk & ((value) << LTC2874_OV_TH_pos)) 242 #define LTC2874_OV_ALLOW (0x1<<1) // REGISTER MODE2 243 #define LTC2874_CQ_SNS_MODE 0x1 // REGISTER MODE2 246 #define LTC2874_NSF4_pos 6 // REGISTER NSF 247 #define LTC2874_NSF4_msk (0x3<<6) // REGISTER NSF 248 #define LTC2874_NSF4(value) (LTC2874_NSF4_msk & ((value) << LTC2874_NSF4_pos)) 249 #define LTC2874_NSF3_pos 4 // REGISTER NSF 250 #define LTC2874_NSF3_msk (0x3<<4) // REGISTER NSF 251 #define LTC2874_NSF3(value) LTC2874_NSF3_msk & ((value) << LTC2874_NSF3_pos)) 252 #define LTC2874_NSF2_pos 2 // REGISTER NSF 253 #define LTC2874_NSF2_msk (0x3<<2) // REGISTER NSF 254 #define LTC2874_NSF2(value) (LTC2874_NSF2_msk & ((value) << LTC2874_NSF2_pos)) 255 #define LTC2874_NSF1_pos 0 // REGISTER NSF 256 #define LTC2874_NSF1_msk 0x3 // REGISTER NSF 257 #define LTC2874_NSF1(value) (LTC2874_NSF1_msk & ((value) << LTC2874_NSF1_pos)) 259 #define LTC2874_ILLM4_pos 6 // REGISTER ILLM 260 #define LTC2874_ILLM4_msk (0x3<<6) // REGISTER ILLM 261 #define LTC2874_ILLM4(value) (LTC2874_ILLM4_msk & ((value) << LTC2874_ILLM4_pos)) 262 #define LTC2874_ILLM3_pos 4 // REGISTER ILLM 263 #define LTC2874_ILLM3_msk (0x3<<4) // REGISTER ILLM 264 #define LTC2874_ILLM3(value) (LTC2874_ILLM3_msk & ((value) << LTC2874_ILLM3_pos)) 265 #define LTC2874_ILLM2_pos 2 // REGISTER ILLM 266 #define LTC2874_ILLM2_msk (0x3<<2) // REGISTER ILLM 267 #define LTC2874_ILLM2(value) (LTC2874_ILLM2_msk & ((value) << LTC2874_ILLM2_pos)) 268 #define LTC2874_ILLM1_pos 0 // REGISTER ILLM 269 #define LTC2874_ILLM1_msk 0x3 // REGISTER ILLM 270 #define LTC2874_ILLM1(value) (LTC2874_ILLM1_msk & ((value) << LTC2874_ILLM1_pos)) 272 #define LTC2874_LPTC_pos 4 // REGISTER TMRCTRL 273 #define LTC2874_LPTC_msk (0xF<<4) // REGISTER TMRCTRL 274 #define LTC2874_LPTC(value) (LTC2874_LPTC_msk & ((value) << LTC2874_LPTC_pos)) 276 #define LTC2874_RETRYTC_pos 0 // REGISTER TMRCTRL 277 #define LTC2874_RETRYTC_msk 0x07 // REGISTER TMRCTRL 278 #define LTC2874_RETRYTC(value) (LTC2874_RETRYTC_msk & (value)) 280 #define LTC2874_WKUP4 (0x1<<7) // REGISTER CTRL1 281 #define LTC2874_WKUP3 (0x1<<6) // REGISTER CTRL1 282 #define LTC2874_WKUP2 (0x1<<5) // REGISTER CTRL1 283 #define LTC2874_WKUP1 (0x1<<4) // REGISTER CTRL1 284 #define LTC2874_DRVEN4 (0x1<<3) // REGISTER CTRL1 285 #define LTC2874_DRVEN3 (0x1<<2) // REGISTER CTRL1 286 #define LTC2874_DRVEN2 (0x1<<1) // REGISTER CTRL1 287 #define LTC2874_DRVEN1 0x1 // REGISTER CTRL1 289 #define LTC2874_ENLP4 (0x1<<7) // REGISTER CTRL2 290 #define LTC2874_ENLP3 (0x1<<6) // REGISTER CTRL2 291 #define LTC2874_ENLP2 (0x1<<5) // REGISTER CTRL2 292 #define LTC2874_ENLP1 (0x1<<4) // REGISTER CTRL2 293 #define LTC2874_SIO_MODE4 (0x1<<3) // REGISTER CTRL2 294 #define LTC2874_SIO_MODE3 (0x1<<2) // REGISTER CTRL2 295 #define LTC2874_SIO_MODE2 (0x1<<1) // REGISTER CTRL2 296 #define LTC2874_SIO_MODE1 0x1 // REGISTER CTRL2 298 #define LTC2874_CQ1 0x01 299 #define LTC2874_CQ2 0x02 300 #define LTC2874_CQ3 0x04 301 #define LTC2874_CQ4 0x08 302 #define LTC2874_CQ_ALL 0x0F 304 #define LTC2874_LP1 0x10 305 #define LTC2874_LP2 0x20 306 #define LTC2874_LP3 0x40 307 #define LTC2874_LP4 0x80 308 #define LTC2874_LP_ALL 0xF0 void LTC2874_write_LPTC_value(uint8_t value)
Change L+ Overcurrent Timer Control (LPTC) setting without Updating.
void LTC2874_sio_mode(uint8_t port)
Sets SIO_MODE bit (and also Clears SLEW bit) for specified port, then Updates.
void LTC2874_write_bit_value(uint8_t LTC2874_register, uint8_t LTC2874_bit, uint8_t value)
Changes value of a register bit without Updating.
void LTC2874_update_all(void)
Updates all registers.
void LTC2874_write_NSF_value(uint8_t port, uint8_t value)
Changes NSF (Noise Suppression Filter) setting for specified port without Updating.
void LTC2874_write_bit_value_update_all(uint8_t LTC2874_register, uint8_t LTC2874_bit, uint8_t value)
Changes value of a register bit, then Updates.
void LTC2874_write_bit_clr_update_all(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Clears a register bit, then Updates.
void LTC2874_write_register_update_all(uint8_t LTC2874_register, uint8_t value)
Writes byte of data to a register, then Updates.
void LTC2874_write_register(uint8_t LTC2874_register, uint8_t value)
Writes byte of data to a register without Updating.
void LTC2874_write_bit_clr(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Clears a register bit without Updating.
void LTC2874_write_bit_set_update_all(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Sets a register bit, then Updates.
void LTC2874_lplus_output(uint8_t port, uint8_t value)
Enables or Disables L+ output for specified port, then Updates.
void LTC2874_cq_output(uint8_t port, uint8_t value)
Enables or Disables CQ output for specified port, then Updates.
void LTC2874_write_bit_set(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Sets a register bit without Updating.
void LTC2874_write_ILLM_value(uint8_t port, uint8_t value)
Changes ILLM (Sinking current) setting for specified port without Updating.
void LTC2874_24v_mode(uint8_t value)
Changes value of the 24VMODE bit, then Updates.
void LTC2874_write_OV_TH_value(uint8_t value)
Changes VDD Overvoltage Threshold (OV_TH) setting without Updating.
void LTC2874_reset(void)
Resets LTC2874, returning default values to registers.
uint8_t LTC2874_read_reg(uint8_t LTC2874_register)
Reads data byte from specified register.
void LTC2874_write_RETRYTC_value(uint8_t value)
Changes Auto-Retry Timer Control (RETRYTC) setting without Updating.
uint8_t LTC2874_read_bit(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Reads a data BIT from specified register.
void LTC2874_wakeup_request(uint8_t port)
Sends WURQ (Wake-up Request) on specified port.
void LTC2874_write_2XPTC_value(uint8_t value)
Changes 2X Current Pulse Timer Control (2XPTC) setting without Updating.