79 #define LTC3676_I2C_ADDRESS 0x3C 80 #define LTC3676_1_I2C_ADDRESS 0x3D 87 #define LTC3676_RES_BUCK1_RTOP 1000. 88 #define LTC3676_RES_BUCK1_RBOT 280. 89 #define LTC3676_RES_BUCK2_RTOP 1000. 90 #define LTC3676_RES_BUCK2_RBOT 1100. 91 #define LTC3676_RES_BUCK3_RTOP 1000. 92 #define LTC3676_RES_BUCK3_RBOT 1100. 93 #define LTC3676_RES_BUCK4_RTOP 1000. 94 #define LTC3676_RES_BUCK4_RBOT 931. 100 #define LTC3676_REG_BUCK1 0x01 101 #define LTC3676_REG_BUCK2 0x02 102 #define LTC3676_REG_BUCK3 0x03 103 #define LTC3676_REG_BUCK4 0x04 104 #define LTC3676_REG_LDOA 0x05 105 #define LTC3676_REG_LDOB 0x06 106 #define LTC3676_REG_SQD1 0x07 107 #define LTC3676_REG_SQD2 0x08 108 #define LTC3676_REG_CNTRL 0x09 109 #define LTC3676_REG_DVB1A 0x0A 110 #define LTC3676_REG_DVB1B 0x0B 111 #define LTC3676_REG_DVB2A 0x0C 112 #define LTC3676_REG_DVB2B 0x0D 113 #define LTC3676_REG_DVB3A 0x0E 114 #define LTC3676_REG_DVB3B 0x0F 115 #define LTC3676_REG_DVB4A 0x10 116 #define LTC3676_REG_DVB4B 0x11 117 #define LTC3676_REG_MSKIRQ 0x12 118 #define LTC3676_REG_MSKPG 0x13 119 #define LTC3676_REG_USER 0x14 120 #define LTC3676_REG_IRQSTAT 0x15 121 #define LTC3676_REG_PGSTATL 0x16 122 #define LTC3676_REG_PGSTATRT 0x17 123 #define LTC3676_REG_HRST 0x1E 124 #define LTC3676_REG_CLIRQ 0x1F 130 #define LTC3676_BUCK_ENABLE 7 131 #define LTC3676_BUCK_STARTUP 4 132 #define LTC3676_BUCK_PHASE_SEL 3 133 #define LTC3676_BUCK_CLOCK_RATE 2 134 #define LTC3676_BUCK_KEEP_ALIVE 1 135 #define LTC3676_BUCK_SLEW 0 141 #define LTC3676_LDO3_ENABLE 5 142 #define LTC3676_LDO3_STARTUP 4 143 #define LTC3676_LDO3_KEEP_ALIVE 3 144 #define LTC3676_LDO2_ENABLE 2 145 #define LTC3676_LDO2_STARTUP 1 146 #define LTC3676_LDO2_KEEP_ALIVE 0 152 #define LTC3676_LDO4_ENABLE 2 153 #define LTC3676_LDO4_STARTUP 1 154 #define LTC3676_LDO4_KEEP_ALIVE 0 160 #define LTC3676_PWR_ON 7 161 #define LTC3676_PB_RESET_TMR 6 162 #define LTC3676_SOFTWARE_CNTRL 5 168 #define LTC3676_BUCK_REF_SELECT 5 174 #define LTC3676_BUCK_PG_MASK 5 180 #define LTC3676_MASK_OT_SHUTDOWN 6 181 #define LTC3676_MASK_OT_WARNING 5 182 #define LTC3676_MASK_UV_SHUTDOWN 4 183 #define LTC3676_MASK_UV_WARNING 3 184 #define LTC3676_MASK_PG_TIMEOUT 2 185 #define LTC3676_MASK_PB_STATUS 0 191 #define LTC3676_ENABLE_PG_LDO4 7 192 #define LTC3676_ENABLE_PG_LDO3 6 193 #define LTC3676_ENABLE_PG_LDO2 5 194 #define LTC3676_ENABLE_PG_BUCK4 3 195 #define LTC3676_ENABLE_PG_BUCK3 2 196 #define LTC3676_ENABLE_PG_BUCK2 1 197 #define LTC3676_ENABLE_PG_BUCK1 0 203 #define LTC3676_USER_7 7 204 #define LTC3676_USER_6 6 205 #define LTC3676_USER_5 5 206 #define LTC3676_USER_4 4 207 #define LTC3676_USER_3 3 208 #define LTC3676_USER_2 2 209 #define LTC3676_USER_1 1 210 #define LTC3676_USER_0 0 216 #define LTC3676_IRQ_OT_SHUTDOWN 6 217 #define LTC3676_IRQ_OT_WARNING 5 218 #define LTC3676_IRQ_UV_SHUTDOWN 4 219 #define LTC3676_IRQ_UV_WARNING 3 220 #define LTC3676_IRQ_PG_TIMEOUT 2 221 #define LTC3676_IRQ_HARD_RESET 1 222 #define LTC3676_IRQ_PB_STATUS 0 228 #define LTC3676_PGL_LDO4 7 229 #define LTC3676_PGL_LDO3 6 230 #define LTC3676_PGL_LDO2 5 231 #define LTC3676_PGL_LDO1 4 232 #define LTC3676_PGL_BUCK4 3 233 #define LTC3676_PGL_BUCK3 2 234 #define LTC3676_PGL_BUCK2 1 235 #define LTC3676_PGL_BUCK1 0 241 #define LTC3676_PGRT_LDO4 7 242 #define LTC3676_PGRT_LDO3 6 243 #define LTC3676_PGRT_LDO2 5 244 #define LTC3676_PGRT_LDO1 4 245 #define LTC3676_PGRT_BUCK4 3 246 #define LTC3676_PGRT_BUCK3 2 247 #define LTC3676_PGRT_BUCK2 1 248 #define LTC3676_PGRT_BUCK1 0 254 #define LTC3676_BUCK_SEQ_MASK(num) (0x03<<((num)*2)-2) 255 #define LTC3676_LDO_SEQ_MASK(num) (0x03<<((num-2)*2)) 256 #define LTC3676_BUCK_MODE_MASK 0x60 257 #define LTC3676_BUCK4_SEQ_MASK 0xC0 258 #define LTC3676_BUCK3_SEQ_MASK 0x30 259 #define LTC3676_BUCK2_SEQ_MASK 0x0C 260 #define LTC3676_BUCK1_SEQ_MASK 0x03 261 #define LTC3676_LDO4_SEQ_MASK 0x30 262 #define LTC3676_LDO3_SEQ_MASK 0x0C 263 #define LTC3676_LDO2_SEQ_MASK 0x03 264 #define LTC3676_UV_WARN_THRESH_MASK 0x1C 265 #define LTC3676_OT_WARN_LEVEL_MASK 0x03 266 #define LTC3676_FB_REF_MASK 0x1F 272 #define LTC3676_1_LDO4_VOLTAGE_MASK 0x18 278 uint8_t register_address,
279 uint8_t *register_data
285 uint8_t register_address,
286 uint8_t register_data
293 uint8_t register_address,
300 uint8_t register_address,
307 uint8_t register_address,
315 uint8_t register_address,
322 uint8_t register_address,
329 uint8_t register_address,
374 float uv_warning_threshold
380 uint8_t ot_warning_level
386 uint8_t ldo4_output_voltage_code
393 uint8_t sequence_phase
400 uint8_t sequence_phase
int8_t LTC3676_bit_clear(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Clears any bit inside the LTC3676 using the standard I2C repeated start format.
float LTC3676_buck_vout_min(uint8_t buck_number)
Calculates the minimum output voltage of any buck in mV based on the feedback resistors.
float LTC3676_set_buck_output_voltage(uint8_t i2c_address, uint8_t register_address, float output_voltage)
Sets the output voltage of any buck.
int8_t LTC3676_set_ldo_sequence_down(uint8_t i2c_address, uint8_t ldo_number, uint8_t sequence_phase)
Sets the Sequence Down bits for any buck in the SQD1 register.
int8_t LTC3676_bit_set(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Sets any bit inside the LTC3676 using the standard I2C repeated start format.
uint8_t LTC3676_bit_is_set(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Reads the value of any bit in any register or the LTC3676.
int8_t LTC3676_set_buck_sequence_down(uint8_t i2c_address, uint8_t buck_number, uint8_t sequence_phase)
Sets the Sequence Down bits for any buck in the SQD1 register.
int8_t LTC3676_register_write(uint8_t i2c_address, uint8_t register_address, uint8_t register_data)
Writes to an 8-bit register inside the LTC3676 using the standard I2C repeated start format...
int8_t LTC3676_set_overtemp_warning_level(uint8_t i2c_address, uint8_t ot_warning_level)
Writes the UV warning threshold of any buck.
int8_t LTC3676_bit_write(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number, uint8_t bit_data)
Writes any bit inside the LTC3676 using the standard I2C repeated start format.
int8_t LTC3676_set_startup_mode(uint8_t i2c_address, uint8_t buck_number, uint8_t startup_bit)
Sets the start-up mode for all bucks.
int8_t LTC3676_1_set_ldo4_voltage(uint8_t i2c_address, uint8_t ldo4_output_voltage_code)
Sets LDO4 output voltage on the LTC3676-1.
float LTC3676_set_buck_fb_ref(uint8_t i2c_address, uint8_t register_address, float fb_ref_voltage)
Writes the Feedback Reference Voltage of any buck.
float LTC3676_buck_vout_max(uint8_t buck_number)
Calculates the maximum output voltage of any buck in mV based on the feedback resistors.
int8_t LTC3676_set_buck_pgood_mask(uint8_t i2c_address, uint8_t buck_number, uint8_t pgood_bit)
Sets the PGOOD mask bit in the DVBxB register for all bucks.
int8_t LTC3676_register_read(uint8_t i2c_address, uint8_t register_address, uint8_t *register_data)
Reads an 8-bit register from the LTC3676 using the standard repeated start format.
int8_t LTC3676_select_buck_reference(uint8_t i2c_address, uint8_t buck_number, int8_t ref_char)
Selects the reference for the specified buck regulator(s).
int8_t LTC3676_set_buck_mode(uint8_t i2c_address, uint8_t buck_number, uint8_t mode)
Sets the switching mode for the specified Buck regulator.
int8_t LTC3676_set_uv_warning_threshold(uint8_t i2c_address, float uv_warning_threshold)
Writes a new UV warning threshold voltage in the CTRL register.