DE0-Nano-SoC-HDMI Board Configuration



Pin Assignments:




Pin Assignment Table:



CLOCK
Name Location Direction Standard
FPGA_CLK1_50 V11 input 3.3-V LVTTL
FPGA_CLK2_50 Y13 input 3.3-V LVTTL
FPGA_CLK3_50 E11 input 3.3-V LVTTL



LED
Name Location Direction Standard
LED[0] W15 output 3.3-V LVTTL
LED[1] AA24 output 3.3-V LVTTL
LED[2] V16 output 3.3-V LVTTL
LED[3] V15 output 3.3-V LVTTL
LED[4] AF26 output 3.3-V LVTTL
LED[5] AE26 output 3.3-V LVTTL
LED[6] Y16 output 3.3-V LVTTL
LED[7] AA23 output 3.3-V LVTTL