Overview
Block Diagram
External Ports
Processor
microblaze_0
Debuggers
debug_module
Busses
axi4lite_0
axi_interconnect_1
microblaze_0_dlmb
microblaze_0_ilmb
Bridge
axi2axi_connector_1
Memory
microblaze_0_bram_block
Memory Controllers
Digilent_Shared_Mem_Bus_Mux
microblaze_0_d_bram_ctrl
microblaze_0_i_bram_ctrl
Peripherals
LEDS
axi_gpio_0
axi_gpio_1
axi_gpio_2
axi_gpio_3
axi_gpio_4
axi_gpio_5
axi_gpio_6
axi_iic_0
axi_iic_1
axi_iic_2
axi_iic_3
axi_spi_0
axi_spi_1
axi_spi_2
axi_spi_3
axi_uartlite_0
axi_uartlite_1
axi_uartlite_2
axi_uartlite_3
axi_uartlite_4
IP
clock_generator_0
proc_sys_reset_0
Timing Information